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Lightator: An Optical Near-Sensor Accelerator with Compressive Acquisition Enabling Versatile Image Processing (2403.05037v1)

Published 8 Mar 2024 in cs.AR and eess.SP

Abstract: This paper proposes a high-performance and energy-efficient optical near-sensor accelerator for vision applications, called Lightator. Harnessing the promising efficiency offered by photonic devices, Lightator features innovative compressive acquisition of input frames and fine-grained convolution operations for low-power and versatile image processing at the edge for the first time. This will substantially diminish the energy consumption and latency of conversion, transmission, and processing within the established cloud-centric architecture as well as recently designed edge accelerators. Our device-to-architecture simulation results show that with favorable accuracy, Lightator achieves 84.4 Kilo FPS/W and reduces power consumption by a factor of ~24x and 73x on average compared with existing photonic accelerators and GPU baseline.

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References (27)
  1. 2011. NCSU EDA FreePDK45. http://www.eda.ncsu.edu/wiki/FreePDK45
  2. Renzo Andri et al. 2018. Yodann: An architecture for ultralow power binary-weight cnn acceleration. IEEE TCAD 37 (2018), 48–60.
  3. Shaahin Angizi et al. 2023. PISA: A Non-Volatile Processing-In-Sensor Accelerator for Imaging Systems. IEEE TETC (2023).
  4. Wim Bogaerts et al. 2012. Silicon microring resonators. Laser & Photonics Reviews (2012), 47–73.
  5. Stephen J Carey et al. 2013. A 100,000 fps vision sensor with embedded 535GOPS/W 256×\times× 256 SIMD processor array. In Symposium on VLSI. IEEE.
  6. Yu-Hsin Chen et al. 2017. Eyeriss: An energy-efficient reconfigurable accelerator for deep convolutional neural networks. IEEE JSSC 52 (2017).
  7. Qixiang Cheng et al. 2020. Silicon photonics codesign for deep learning. Proc. IEEE 108 (2020), 1261–1282.
  8. Jaehyuk Choi et al. 2015. An energy/illumination-adaptive CMOS image sensor with reconfigurable modes of operations. IEEE JSCC 50, 6 (2015), 1438–1450.
  9. Abbas El Gamal et al. 1999. Pixel-level processing: why, what, and how?. In Sensors, Cameras, and Applications for Digital Photography, Vol. 3650. SPIE, 2–13.
  10. Tzu-Hsiang Hsu et al. 2019. AI edge devices using computing-in-memory and processing-in-sensor: from system to device. In IEDM.
  11. A 0.5-V Real-Time Computational CMOS Image Sensor With Programmable Kernel for Feature Extraction. IEEE JSSC 56 (2020), 1588–1596.
  12. Weichen Liu et al. 2019. Holylight: A nanophotonic accelerator for deep learning in data centers. In DATE. IEEE, 1483–1488.
  13. Bert Moons et al. 2017. 14.5 envision: A 0.26-to-10tops/w subword-parallel dynamic-voltage-accuracy-frequency-scalable convolutional neural network processor in 28nm fdsoi. In ISSCC. IEEE, 246–247.
  14. Kyle Shiflett et al. 2021. Albireo: Energy-efficient acceleration of convolutional neural networks via silicon photonics. In ISCA. IEEE, 860–873.
  15. Ruibing Song et al. 2022. A reconfigurable convolution-in-pixel cmos image sensor architecture. IEEE TCSVT (2022).
  16. Febin Sunny et al. 2021a. CrossLight: A cross-layer optimized silicon photonic neural network accelerator. In DAC. IEEE, 1069–1074.
  17. Febin Sunny et al. 2022. A silicon photonic accelerator for convolutional neural networks with heterogeneous quantization. In GLSVLSI. 367–371.
  18. Febin P Sunny et al. 2021b. ARXON: A framework for approximate communication over photonic networks-on-chip. TVLSI 29 (2021), 1206–1219.
  19. Febin P Sunny et al. 2021c. ROBIN: A robust optical binary neural network accelerator. ACM TECS 5s (2021), 1–24.
  20. Sepehr Tabrizchi et al. 2023. AppCiP: Energy-Efficient Approximate Convolution-in-Pixel Scheme for Neural Network Acceleration. IEEE JETCAS (2023), 225–236.
  21. Kea-Tiong Tang et al. 2019. Considerations of integrating computing-in-memory and processing-in-sensor into convolutional neural network accelerators for low-power edge devices. In Symposium on VLSI. IEEE.
  22. Shyamkumar Thoziyoor et al. 2008. CACTI 5.1. Technical Report. Technical Report HPL-2008-20, HP Labs.
  23. Han Xu et al. 2020. Macsen: A processing-in-sensor architecture integrating mac operations into image sensor for ultra-low-power bnn-based intelligent visual perception. IEEE TCAS II 68 (2020), 627–631.
  24. Han Xu et al. 2021. Senputing: An Ultra-Low-Power Always-On Vision Perception Chip Featuring the Deep Fusion of Sensing and Computing. IEEE TCASI (2021).
  25. Tomohiro Yamazaki et al. 2017. 4.9 A 1ms high-speed vision chip with 3D-stacked 140GOPS column-parallel PEs for spatio-temporal image processing. In ISSCC. IEEE, 82–83.
  26. Zheng Zhao et al. 2019. Hardware-software co-design of slimmed optical neural networks. In ASP-DAC. IEEE, 705–710.
  27. Farzaneh Zokaee et al. 2020. LightBulb: A photonic-nonvolatile-memory-based accelerator for binarized convolutional neural networks. In DATE. IEEE, 1438–1443.
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