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From PID to ADRC and back: expressing error-based active disturbance rejection control schemes as standard industrial 1DOF and 2DOF controllers (2305.16705v1)

Published 26 May 2023 in eess.SY and cs.SY

Abstract: In this paper, we uncover a new connection between standard PI/PID controllers and active disturbance rejection control (ADRC), from which we establish formal conditions of equivalence between the two control schemes. Using the equivalence, we devise a step-by-step procedure of transitioning from PI/PID to error-based ADRC. We also show how to go from 1DOF to 2DOF ADRC while retaining a standard 2DOF PI/PID structure. Both procedures facilitate expressing error-based ADRC schemes as standard industrial 1DOF and 2DOF controllers. This allows the designed controller to have the desired characteristic of ADRC (i.e. strong robustness against internal and external uncertainties) while still being expressed in a form that is familiar to industrial practitioners, where PI/PID structures are still the workhorse of modern control systems. The results of the paper ensure backward compatibility of future ADRC-based solutions and foster the adoption of active disturbance rejection-based methods in industrial practice as a viable alternative to standard controllers. To further support the findings, a set of tests is conducted in time and frequency domain, followed by a comparative analysis in FPGA-in-the-loop simulation utilizing a realistic plant model.

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