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Bundle Adjustment on a Graph Processor (2003.03134v2)

Published 6 Mar 2020 in cs.CV and cs.DC

Abstract: Graph processors such as Graphcore's Intelligence Processing Unit (IPU) are part of the major new wave of novel computer architecture for AI, and have a general design with massively parallel computation, distributed on-chip memory and very high inter-core communication bandwidth which allows breakthrough performance for message passing algorithms on arbitrary graphs. We show for the first time that the classical computer vision problem of bundle adjustment (BA) can be solved extremely fast on a graph processor using Gaussian Belief Propagation. Our simple but fully parallel implementation uses the 1216 cores on a single IPU chip to, for instance, solve a real BA problem with 125 keyframes and 1919 points in under 40ms, compared to 1450ms for the Ceres CPU library. Further code optimisation will surely increase this difference on static problems, but we argue that the real promise of graph processing is for flexible in-place optimisation of general, dynamically changing factor graphs representing Spatial AI problems. We give indications of this with experiments showing the ability of GBP to efficiently solve incremental SLAM problems, and deal with robust cost functions and different types of factors.

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Authors (4)
  1. Joseph Ortiz (15 papers)
  2. Mark Pupilli (3 papers)
  3. Stefan Leutenegger (66 papers)
  4. Andrew J. Davison (64 papers)
Citations (37)

Summary

  • The paper introduces a novel IPU-accelerated approach for bundle adjustment using Gaussian Belief Propagation, outperforming the traditional Ceres library by 24x.
  • The method efficiently maps factor graphs onto the processor's distributed on-chip memory, enabling rapid convergence on dynamic visual estimation tasks.
  • The integration of a Huber cost function enhances robustness against noisy data, paving the way for real-time spatial AI applications in robotics and AR.

Bundle Adjustment on a Graph Processor

The paper presents an exploration of applying Gaussian Belief Propagation (GBP) to solve the classical computer vision problem of bundle adjustment (BA) using Graphcore's Intelligence Processing Unit (IPU). This approach represents a shift towards leveraging novel computer architectures, specifically those designed for Artificial Intelligence workloads, which boast massively parallel computation capabilities and on-chip distributed memory.

The central contribution of this paper is the novel implementation of BA on a graph processor, showcasing the IPU's potential for accelerating bundle adjustment by mapping factor graphs directly onto its architecture. The authors demonstrate significant performance improvements, with a reported 24x speed advantage over the established Ceres library, which traditionally employs CPU for solving similar problems using the Levenberg-Marquardt algorithm.

Key Components and Results

  • Graph Processor Utilization: The IPU’s graph-based architecture is shown to be highly suitable for GBP, an algorithm that inherently benefits from a fully distributed processing environment. The IPU, unlike conventional GPUs, minimizes data transfer focus through its densely connected tile structure, each with local processing and memory, facilitating high-efficiency message-passing operations.
  • Bundle Adjustment Implementation: The researchers implement a GBP algorithm tailored for BA tasks, achieving rapid convergence on diverse sequences from standard datasets. Initial experiments validated the approach, particularly highlighting the IPU’s ability to handle incremental and dynamically changing factor graphs, a typical requirement in real-world SLAM scenarios.
  • Robustness and Speed: The GBP implementation not only achieves faster convergence speeds but also maintains robustness in scenarios with noisy data associations. The inclusion of a Huber cost function allows efficient outlier rejection, which is critical for robust visual estimation tasks in uncontrolled environments.

Practical and Theoretical Implications

The practical implications of these results are significant for real-time spatial AI applications, such as robotics and augmented reality systems, where the speed and efficiency of visual estimation tasks can drastically impact performance. The use of IPU and graph-based processing suggests a promising direction towards low-power, high-efficiency computation devices that can operate effectively in embedded systems.

Theoretically, this research opens avenues for further exploration of factor graph-based optimization techniques using graph processors. The demonstrated improvements in computational efficiency and flexibility suggest broader applications beyond BA, into more complex, dynamically evolving estimation problems.

Future Directions

This work sets the stage for future research focused on scaling GBP implementations on multi-chip setups or optimizing data management for single-chip solutions. The potential extension of this framework to other AI and machine learning tasks, such as dynamic scene recognition and heterogeneous factor incorporation, holds promise for further enhancing the efficiency and capability of spatial AI systems.

By leveraging the architectural strengths of novel processors like the IPU, this research underscores the transformative potential of adapting classical algorithms to modern, specialized hardware — a step towards more efficient and flexible AI solutions in computational vision and beyond.

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