Arithmetic Circuit Lower Bounds via MaxRank (1302.3308v1)

Abstract: We introduce the polynomial coefficient matrix and identify maximum rank of this matrix under variable substitution as a complexity measure for multivariate polynomials. We use our techniques to prove super-polynomial lower bounds against several classes of non-multilinear arithmetic circuits. In particular, we obtain the following results : As our main result, we prove that any homogeneous depth-3 circuit for computing the product of $d$ matrices of dimension $n \times n$ requires $\Omega(n^{d-1}/2^d)$ size. This improves the lower bounds by Nisan and Wigderson(1995) when $d=\omega(1)$. There is an explicit polynomial on $n$ variables and degree at most $\frac{n}{2}$ for which any depth-3 circuit $C$ of product dimension at most $\frac{n}{10}$ (dimension of the space of affine forms feeding into each product gate) requires size $2^{\Omega(n)}$. This generalizes the lower bounds against diagonal circuits proved by Saxena(2007). Diagonal circuits are of product dimension 1. We prove a $n^{\Omega(\log n)}$ lower bound on the size of product-sparse formulas. By definition, any multilinear formula is a product-sparse formula. Thus, our result extends the known super-polynomial lower bounds on the size of multilinear formulas by Raz(2006). We prove a $2^{\Omega(n)}$ lower bound on the size of partitioned arithmetic branching programs. This result extends the known exponential lower bound on the size of ordered arithmetic branching programs given by Jansen(2008).

• The paper shows that the introduction of the maxrank measure yields super-polynomial lower bounds for homogeneous depth-3 arithmetic circuits computing matrix products.
• It extends lower bounds to circuits with bounded product dimensions and product-sparse formulas, highlighting exponential size limitations.
• The study also demonstrates exponential lower bounds for partitioned arithmetic branching programs, informing efficient circuit architecture choices.

Arithmetic Circuit Lower Bounds via MaxRank

Introduction

The paper "Arithmetic Circuit Lower Bounds via MaxRank" (1302.3308) introduces a new complexity measure for multivariate polynomials, termed the polynomial coefficient matrix's maximum rank, and utilizes this measure to establish lower bounds for certain classes of non-multilinear arithmetic circuits. The core contribution of the paper lies in demonstrating how these bounds manifest in various circuit configurations, with specific attention to homogeneous depth-$3$ circuits.

Fundamental Concepts

The polynomial coefficient matrix is defined for multivariate polynomials as an extension of the partial derivatives matrix, adjusting entries to be polynomials rather than constants. The paper presents the concept of maxrank, representing the maximum rank of this matrix under any variable substitution. This parameter is central to deriving the upper bounds on circuit complexity measures.

Main Results

1. Homogeneous Depth-$3$ Circuits: The paper achieves a super-polynomial lower bound on the size of homogeneous depth-$3$ circuits (also known as $\Sigma\Pi\Sigma$ circuits) when computing the product of $d$ matrices of size $n \times n$. The derived size requirement is $\Omega(n^{d-1}/2^d)$, representing an improvement over previously established bounds for such circuits when $d$ is large.

• Implementation Insight: Developers can leverage this result to identify the computational limits of certain circuit architectures, specifically avoiding certain configurations that inherently lead to inefficiencies due to size constraints.

1. Bounding Product Dimension: The paper extends the lower bounds to circuits with bounded product dimensions, establishing exponential size requirements under certain configurations of affine forms feeding into each product gate.

• Practical Application: This informs engineers and computer scientists on the configurations to avoid when designing efficient polynomial computation circuits, providing a guidepost for maximizing circuit efficiency without succumbing to exponential growth.

1. Product-Sparse Formulas: For product-sparse formulas, the paper identifies polynomial coefficient matrix characteristics that lead to size restrictions based on maxrank considerations. Through systematic analysis, the authors show that even these formula types face super-polynomial size constraints.

• Design Consideration: Practitioners can use this analysis as a guide to avoid futile attempts at reducing complexity through product-sparse formulas, thus directing resources towards architectures with feasible size prospects.

1. Partitioned Arithmetic Branching Programs: The paper presents size restrictions for partitioned arithmetic branching programs, establishing exponential lower bounds and thus demonstrating limitations of this model in computing full max-rank polynomials.

• Strategic Deployment: In applied contexts, this result helps practitioners evaluate the appropriateness of branching program architectures, especially in polynomial evaluations that require efficient handling of high-degree variables.

Implications and Future Work

The results from this paper delineate limitations inherent in current circuit design strategies, guiding future research and application development away from infeasible configurations. The identification of maxrank as a pivotal component opens avenues for exploring further applications and extensions of this measure in broader contexts, potentially leading to new circuit architectures that balance efficiency with computational depth.

Conclusion

Overall, this paper provides rigorous theoretical groundwork that can redefine approaches to arithmetic circuit design, emphasizing the importance of structural components such as maxrank. For experienced researchers and engineers, these insights present both a challenge and an opportunity to innovate within the constraints outlined, pushing forward the boundaries of what is achievable in polynomial computation and circuit design.